Podules

Introduction

The IYONIX pc provides podule slots to enable existing podules to be used. In most cases it will be necessary to update the software in the podule ROM to update it to be 32-bit compatible. This may involve physically replacing the podule ROM or upgrading it via a Flash ROM programming utility.

RISC OS 5 will silently ignore expansion card modules that are not 32-bit compatible and will silently replace 26-bit loaders with a dummy 32-bit one.

SWI Changes

The Podule Manager SWIs have been updated for The IYONIX pc as follows:

Podule_CallLoader (SWI &40286)

No changes. However, loaders which are not marked as being 32-bit safe with 32OK after their opening 4 word table will report an error. This is covered separately in the 32-bit documentation.

Podule_ReadInfo (SWI &4028D)

Though not explicitly mentioned, addresses returned of zero signify that that region is not present (eg entering with bit 29 set and getting back zero means there is no MEMC space).

Podule_SetSpeed (SWI &4028E)

In the IYONIX pc, there are 4 new speeds defined for EFGH cycles, and also the restriction on being able to select only A and C cycles on the Risc PC series platform has been removed.

The defined speeds are:

Podule_Speed_TypeA		1
Podule_Speed_TypeB		2
Podule_Speed_TypeC		3
Podule_Speed_TypeD		4
Podule_Speed_TypeE		5
Podule_Speed_TypeF		6
Podule_Speed_TypeG		7
Podule_Speed_TypeH		8

The timings are now all defined in terms of a 64MHz master clock (rather than 16MHz clock in the Extended Expansion card specification issue 5):

	A	B	C	D	E	F	G	H
pre nEASI run in	4	4	4	4	2	2	2	2
nEASI to nIOR/nIOW	6	6	2	2	3	3	1	1
nIOR/nIOW low time	16	12	8	4	8	6	4	2
nIOR/nIOW to nEASI	6	2	2	2	3	1	1	1
post nEASI run out	4	4	4	4	2	2	2	2
total cycle time	36	28	20	16	18	14	10	8

These speeds may not all be available on future platforms, so your code should check for Podule manager returning with V=1 for invalid combinations. The most compatible approach would be:

Choose fastest access speed the EASI card can manage
Call XPodule_SetSpeed with the R0=corresponding speed setting
If it returns with V=1 then decrement R0 and repeat step 2

Podule_HardwareAddress (SWI &40289) and
Podule_HardwareAddresses (SWI &4028B)

See the note below about ROM sections in R3.

ROM sections (value passed in R3)

As detailed in PRM 5a, with the exception of Podule_ReturnNumber the value passed in R3 need not be simply an expansion card number or ROM section number.

The PRM details some pseudo code with various AND masks to show how the address passed in R3 is mapped back to an expansion card number.

The pseudo code described in volume 5a Expansion card support is no longer used internally by the module, though this is of no concern since the externally visible interface remains unchanged. Podule manager now does simple address matching in an attempt to deduce which podule you are trying to refer to.

Where R3 contains a combined hardware address (see Podule_HardwareAddress(es)) note that bits 0-10 are the CMOS RAM address and 11 upwards define the address which is now arbiter.

Unchanged SWIs

The following SWIs have not changed from the RISC OS 3.50 version of the Podule Manager, as documented in the RISC OS 3 Programmer's Reference Manual:

Podule_ReadID (SWI &40280)

Podule_ReadHeader (SWI &40281)

Podule_EnumerateChunks (SWI &40282)

Podule_EnumerateChunksWithInfo (SWI &4028A)

Podule_ReadChunk (SWI &40283)

Podule_ReadBytes (SWI &40284)

Podule_ReturnNumber (SWI &4028C)

Podule_WriteBytes (SWI &40285)

Podule_RawRead (SWI &40287)

Podule_RawWrite (SWI &40288)

Making Expansion ROM Images

An updated version of Acorn's MakeExpROM is available to download as expansion.zip. A summary of the changes is included in a text file.